BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//INPACE Hub - ECPv6.17.5.1//NONSGML v1.0//EN
CALSCALE:GREGORIAN
METHOD:PUBLISH
X-ORIGINAL-URL:https://inpacehub.eu
X-WR-CALDESC:Events for INPACE Hub
REFRESH-INTERVAL;VALUE=DURATION:PT1H
X-Robots-Tag:noindex
X-PUBLISHED-TTL:PT1H
BEGIN:VTIMEZONE
TZID:Europe/Zurich
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:20250330T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:20251026T010000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:20260329T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:20261025T010000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:20270328T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:20271031T010000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:20280326T010000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:20281029T010000
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTART;TZID=Europe/Zurich:20261015T110000
DTEND;TZID=Europe/Zurich:20261015T120000
DTSTAMP:20260922T070939Z
CREATED:20260922T070837Z
LAST-MODIFIED:20260922T070939Z
UID:10000071-1792062000-1792065600@inpacehub.eu
SUMMARY:Webinar - Toward Low Power Cryogenic Si MOSFETs
DESCRIPTION:High-performance computing based on the von Neumann architecture is facing increasing power and energy-efficiency challenges. Cryogenic computing\, spanning von Neumann\, neuromorphic\, and quantum systems\, has emerged as a promising approach to enable highly energy-efficient data processing. CMOS technology remains a key platform for implementing these systems\, but conventional devices optimized for room-temperature operation face fundamental challenges at cryogenic temperatures. As the temperature approaches absolute zero\, the subthreshold swing (SS) becomes increasingly limited by band-tail effects\, while the threshold voltage increases due to bandgap widening and Fermi-level shifts. These effects degrade transistor performance and pose significant challenges for low-power circuit operation and design. \n\nThis presentation discusses the key physical and technological challenges of cryogenic CMOS and explores device and material strategies for overcoming these limitations. In addition\, the feasibility of cryogenic memory based on a single fully depleted silicon-on-insulator (FDSOI) MOSFET will be presented. By integrating memory and logic functionalities within a CMOS-compatible platform\, this work points toward highly energy-efficient and scalable computing systems operating at cryogenic temperatures.\n\n\nREGISTER NOW
URL:https://inpacehub.eu/event/webinar-toward-low-power-cryogenic-si-mosfets/
LOCATION:Online
ATTACH;FMTTYPE=image/jpeg:https://inpacehub.eu/wp-content/uploads/2026/09/TWG10.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20261102
DTEND;VALUE=DATE:20261104
DTSTAMP:20261001T111622Z
CREATED:20260911T112203Z
LAST-MODIFIED:20261001T111622Z
UID:10000068-1793577600-1793750399@inpacehub.eu
SUMMARY:EU-India Digital Cooperation Conference 2026
DESCRIPTION:Driving cooperation in digital technologies and policies between the EU and India forward \nThe EU-India Digital Cooperation Conference will bring together policymakers\, researchers\, innovators\, and business leaders to discuss and advance the cooperation between the European Union and India in the field of digital technologies and their application. It supports the Trade and Technology Council between the EU and India (Working Group 1 – Strategic Technologies\, Digital Governance\, and Digital Connectivity). This will be put into the broader context of the collaboration of the EU with the Indo-Pacific countries.   \nEurope offers great opportunities for researchers and innovators from India and the whole Indo-Pacific region. The European Union’s Horizon Europe Research and Innovation Funding programme is one of the largest and broadest in the world and is open for collaboration with a large number of countries. Japan and the Republic of Korea are already associated with Horizon Europe and negotiations between the EU and India are under way. Moreover\, organisations from low- and middle-income countries are entitled to apply for funding within the scope of calls for proposals. The programme funds a broad range of activities\, from research scholarships and staff exchange to large-scale collaborative innovation projects that involve industry\, end-users\, researchers\, and others.  \nThe EU-India Digital Cooperation Conference 2026 will discuss core digital technologies and opportunities for collaboration between the EU and the Indo-Pacific countries on the development of technologies and their applications as well as technology-related regulations and policies. The Conference will provide a forum for in-depth exchanges on possible cooperations already within the open calls for 2027 in the current Framework Programme of Horizon Europe but also for the next phase which will start in 2028.  \nThe conference will include a closed-door (upon invitation only) Policy Roundtable under the headline   \nFrom Agenda to Delivery: EU–India Digital Cooperation post-2026 Summit \nLEARN MORE AND REGISTER
URL:https://inpacehub.eu/event/india-eu-digital-cooperation-conference-2026/
LOCATION:South Asian University\, New Delhi
ATTACH;FMTTYPE=image/jpeg:https://inpacehub.eu/wp-content/uploads/2026/09/Main-visual_EU-India-Digital-Cooperation-Conference-2026-scaled.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20270426
DTEND;VALUE=DATE:20270501
DTSTAMP:20260911T093040Z
CREATED:20260911T093040Z
LAST-MODIFIED:20260911T093040Z
UID:10000067-1808697600-1809129599@inpacehub.eu
SUMMARY:E3 International Spring School (Energy Efficient Electronics)
DESCRIPTION:E3 Spring School (Energy Efficient Electronics) is an International School with a 3-days course aimed at providing training for graduate students\, postdoctoral\, technologists\, engineers and scientists from universities\, laboratories and companies\, all around the world\, in the field of Energy Efficient Electronics. Courses cover the fundamentals and applications of selected\, important aspects fields for that were chosen as being very important aspects of future Micro- and Nano-electronics; many of these are connected with running EU and advanced international research projects.\nE3 International Spring School E3 invites you to spend 3 days diving into the fascinating world of chips\, and to connect with researchers from leading semiconductor countries. You will attend advanced lectures and engage in scientific exchange with leading experts from academia and industry\, and build your network. The program will cover the following topics: \n\n\nNovel materials\nAdvanced logic and memory devices\nNew computing architectures\nEnergy efficient smart power and smart sensing components\nHeterogeneous 3D integration and advanced packaging for future electronic systems\n\nTalks will be delivered by representatives from leading universities\, research institutes and companies in Europe and Asia. \nMore information: International Spring School – Advanced Materials\, Devices\, and Heterogeneously Integrated Architectures for Next-Generation Energy-Efficient Electronics – SiNANO
URL:https://inpacehub.eu/event/e3-international-spring-school-energy-efficient-electronics/
LOCATION:L’ESCANDILLE 931 Route de la Sure 38880 Autrans Méaudre en Vercors\, FRANCE
ATTACH;FMTTYPE=image/jpeg:https://inpacehub.eu/wp-content/uploads/2026/09/E3-Spring-school.jpg
END:VEVENT
END:VCALENDAR